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Intel 14A PDK 0.9 lands as node tracks toward 2028 production

Intel Foundry has released its 14A process design kit 0.9, with silicon-backed maturity claims and PDK 1.0 planned for the first quarter of 2027.

Edited by Dot Matrix, Editor-in-Chief


A silicon wafer with test patterns rests on an electronics workbench with a microscope and design documents.
Intel 14A PDK 0.9 reaches silicon-backed maturity. Illustration generated by AI.

Intel Foundry last week put Intel 14A process design kit (PDK) version 0.9 in customers’ hands, a concrete step on the path from lab silicon to chips that can ship. The company says the node is hitting the performance and yield maturity expected at this stage, with results checked against real silicon rather than pure simulation.1

A PDK is the packet of transistor models, design rules, and related data that lets chip teams build products for a given manufacturing process inside electronic design automation (EDA) tools—the software used to draw and verify a chip before it ever hits a fab. Version 0.9 matters because it is grounded in measured silicon, so designers can plan performance and power with fewer unknowns. Intel says that kit supports designs aimed at risk production around the time the process is certified, which can cut the number of silicon spins between first tape-out and volume parts—if the models stay true to the wafers.1

Think of PDK 0.9 as a shop drawing taken from parts already on the bench, not a sketch from the whiteboard. It is still not a green light for mass production. Intel plans PDK 1.0 in the first quarter of 2027 to mark high-volume manufacturing (HVM) readiness. Risk production for Intel’s own products is expected in the second half of 2027, with mass production on 14A slated for 2028.1

Intel 14A builds on foundations from Intel 18A and adds second-generation RibbonFET 2 gate-all-around (GAA) transistors, PowerDirect backside power delivery that feeds power straight to transistor source and drain regions without intermediate through-silicon vias like PowerVia, and Turbo Cells—high-performance standard cells meant to speed timing-critical paths in CPUs and GPUs. This announcement does not refresh transistor performance, power, or density numbers. Experience from a year of 18A production is being applied to 14A, with heavier work on inline defect detection, modeling, and simulation aimed at yields, variability, transistor behavior, and shorter cycle times.1

Ben Sell, corporate vice president and general manager of front-end technology development at Intel Foundry, said PDK 0.9 gives customers confidence to design on 14A as the tech reaches “industry-standard performance and yield maturity” for this stage, backed by silicon validation. Intel has also pulled equipment and materials suppliers into development earlier and runs yield summits with them. On the design side, Cadence is in a design-technology co-optimization effort with Intel on AI-driven tools and IP, while Keysight, Siemens, and Synopsys have design-tool certifications for the process. No external customers, tape-outs, or manufacturing deals were named. Later 14A-E and 14A-P refinements are planned after the base node, without public schedules yet.1

Our read: PDK 0.9 is a schedule and trust marker more than a finished process: silicon-backed models and an early-2027 PDK 1.0 target line up with risk builds in late 2027 and volume in 2028, but external foundry wins still have to show up in named commitments and on-time HVM proof.

On the bench: if you are watching Intel Foundry for future CPU or GPU silicon, this is the paperwork milestone that lets partners start serious layout work—not the day finished chips leave the line.

Footnotes

  1. Tom’s Hardware, “Intel 14A moves closer to production as PDK 0.9 becomes available”. Retrieved November 4, 2026. ↩ ↩2 ↩3 ↩4 ↩5

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